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Applied Materials Introduces Selective
Tungsten Process
At SEMICON West 2020, Applied
Applied’s Selective Tungsten techengineering challenges to enable
Materials, Inc. introduced a new Se- 2D scaling to continue,” said Dan
nology is an Integrated Materials
lective Tungsten process technology
Solution that combines multiple
Hutcheson, chairman and CEO of
that lowers contact resistance which
process technologies in a pristine,
VLSIresearch. “Liner-barriers have
impedes transistor performance and
high-vacuum environment that is many
become our industry’s equivalent
increases power consumption. With
times cleaner than the cleanroom itself.
to arterial plaque, robbing the chip
this technology, node scaling
Atomic-level surface treatments
of transistors and their conare applied to the wafer, and
tacts can continue to 5nm,
a unique deposition process
3nm and below, enabling
is employed so that tungsten
simultaneous advances in
atoms are selectively deposited
chip power, performance and
in the contact vias, creating a
area/cost (PPAC).
perfect bottom-up fill with no
While advances in lithogdelamination, seams or voids.
raphy have helped shrink the
“For decades, the industry
transistor contact vias, the
could count on 2D scaling to
traditional approach to filling
drive simultaneous improvethe vias with contact metal
ments in power, performance
has become a critical botand area/cost,” said Kevin
tleneck to PPAC.
Moraes, vice president, SemiTraditionally, the transistor
conductor Products Group at
contacts have been formed
Applied Materials. “But today,
in a multi-layer process.
the geometries are becoming
Applied Materials’ innovative Selective
The contact via is first lined
so small that we are hitting the
Tungsten process technology removes the
with an adhesion and barrier contact resistance bottleneck that impedes
physical limits of conventional
layer made of titanium nimaterials and materials engitransistor power and performance scaling in
tride, then a nucleation layer advanced foundry-logic nodes.
neering techniques. Our Inteis deposited, and finally
grated Materials Solution for
the remaining space is filled with
Selective Tungsten is a great example
of the flow of electrons it needs for
tungsten, which is the contact metal
of how Applied Materials is inventing
peak performance. Applied Mateof choice due to its low resistivity.
rials’ selective tungsten is the break- new ways to shrink, without comproAt the 7nm foundry node, the
mising power and performance.”
through we’ve been waiting for.”
contact via is only about 20nm in diThe new Endura system has been
Selective tungsten deposition
ameter. The liner-barrier and nucleselected by multiple leading customers
ation layers occupy approximately 75 Applied’s new Endura® Volta™
worldwide. It is the latest addition
Selective Tungsten CVD system
percent of the via’s volume, leaving
to Applied’s portfolio of innovative
only around 25 percent of the volume enables chipmakers to selectively
selective process technologies which
deposit tungsten in the transistor
for tungsten. The thin tungsten wire
include selective epitaxy, selective
has very high contact resistance, and contact vias, eliminating the lindeposition and selective removal.
er-barrier and nucleation layers. The These selective processes allow chipthis creates a major bottleneck to
entire via is filled with low-resisPPAC and further 2D scaling.
makers to create, shape and modify
tance tungsten, and the bottleneck to materials in entirely new ways to
“With the arrival of EUV, we
need to solve some critical materials continued PPAC scaling is removed.
enable continued advances in PPAC.
12 | Wednesday, July 22www.semiconductordigest.com
