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sponsored by
SEMI
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leaders and board members.”
Barrett succeeds former SEMI CFO and Business
Operations officer, Kevin Bauer.
“Kevin was instrumental in laying a strong foundation
for SEMI’s financial growth strategy,” said Manocha.
“He guided SEMI in financing the expansion of our
programs to address the global semiconductor industry’s most pressing challenges, and he executed on our
strategic plan to develop diversified revenue streams
and emerge stronger than ever post-pandemic. We thank
Kevin for his invaluable service to SEMI, our members
and the industry.”
Barrett earned his master’s degree in business administration from Santa Clara University and his bachelor’s
degree in finance from California State University of
Chico. He will report directly to Manocha.
AI in Every Layer: Engineering the Future of
Technology and Talent
At Semicon West 2025,
Lam Research’s Senior
Vice President of the Global
Products Group, Sesha
Varadarajan, delivered
a keynote that was both
a strategic blueprint and
a challenge to the semiconductor industry. “This
industry is poised for explosive
growth, but this won’t just happen
because somebody wrote it in a
slide,” he declared. “It requires every
part of the ecosystem to innovate and
execute.”
Lam’s Platinum sponsorship of the
event underscored its commitment
to driving transformation across
both technology and talent. That
evolution includes not only new
device architectures and materials
but also groundbreaking software
like Fabtex™ Yield Optimizer—a
Semiverse® Solutions innovation
designed to accelerate yield
improvement in high-volume manufacturing (HVM).
The AI imperative and
device roadmaps
“Model sizes are exploding,
inference is happening in real time
at the edge, and AI is moving everything closer to where the data is
22 | Thursday, October 9
Sesha Varadarajan is
senior vice president
of the Global Products
Group at Lam Research
generated,” Varadarajan
explained. These shifts
demand radical innovation
across all device types.
Lam anticipates a leap from
FinFET to gate-all-around (GAA)
transistors, and eventually to CFET,
where NMOS and PMOS are stacked
vertically. DRAM is evolving toward
vertical gate architectures like 4F²
and full 3D configurations. NAND,
already vertical for over a decade,
continues to scale through new
materials, 2D shrinkage, and logical
improvements.
“We are in the era where packaging
is as important to continued scaling
as everything else,” Varadarajan
said. “Advanced packaging brings all
these three device types together…
to incorporate novel architectures
that may include silicon photonics in
the future.”
“The innovation is needed not
just from the traditional density
and speed perspective,” he added,
“but equally importantly from a
power consumption standpoint.”
He emphasized that disruptive
innovation requires global collaboration and early-stage execution:
“Accelerated pace of disruptive innovations is key to building the future
of AI. Requires a lot of collaboration
to bring that.”
Lam’s innovation framework
and breakthrough technologies
Lam’s innovation strategy centers
on three axes: thinner materials,
taller architectures, and smaller
features.
“As devices shrink, there’s less space
for functional materials—that’s
obvious,” Varadarajan said. “But…
you actually have to overcompensate
because we need to get power consumption down, and that requires
atomic-scale reengineering.”
Cryogenic etching is a standout.
“Cryogenic etching conceptually is
quite simple—hold the wafer temperature very cold,” he explained.
“You can parlay that in many different ways—better profile control,
leaner chemistries, higher etch
rates, etching deeper.” Cryogenic
etching on Lam’s Sense.i® platform
delivers “huge benefits in terms of
profile control—80% reduction,”
and “over a 90% reduction in carbon
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emissions.”
www.semiconductordigest.com
